Up to now, there have been known an electronic part and a print wiring board in which: wiring patterns are formed on an insulating layer; and the wiring patterns are laminated in a thickness direction thereof to form a multi-layer structure.
Various manufacturing methods of forming the multi-layer structure have been proposed and disclosed. FIG. 6A and FIG. 6B are step explanatory diagrams each showing a conventional step of manufacturing an electronic part for each layer.
In FIG. 6A, laser irradiation is performed to make a hole on a surface of an insulating layer 1. Then, a hole 2 is formed through laser processing, and thereafter, a conductor portion, which is composed of a film or has a columnar shape, is formed inside the hole 2 by filling a conductive paste into the hole 2 or performing plating.
In FIG. 6B, conductor portions 4 are formed on a surface of a preformed insulating layer 3 through plating or etching. After the conductor portions 4 are formed through the above step, an insulating resin 5 is applied onto a surface of each of the conductor portions 4 through spin coating (for example, refer to JP 10-22636 A).
Another method has been known in which: a bump composed of a conductive paste is formed on a wiring of a substrate; then, an interlayer connecting insulating member and a metal layer are arranged; the bump is made to penetrate into a forming resin through pressing; and resultingly, the bump is conductively connected with the metal layer (for example, refer to JP 2002-137328 A).
Further, a method has been disclosed in which: a penetrating hole is formed by means of a carbon dioxide gas laser or the like; a paste containing powder of a low-resistance metal such as gold, silver, copper, or aluminum is filled into the penetrating hole; and resultingly, a via hole conductor is formed (for example, refer to JP 2002-134881 A).
Moreover, a method has been disclosed in which: a resin is applied to the periphery of an interlayer connecting conductor post; and the resin is pressed through an emery paper-like mould releasing film having moderate roughness on its surface to form an insulating layer (for example, refer to JP 06-57455 B).
As regards the electronic part including a multi-layer structure, incorporating elements and the like into the electronic part has been examined with the aim of attaining a higher density and a higher function. Here, when an element such as a passive part is to be formed between wiring patterns overlapped in a lamination direction, a distance between the wiring patterns serves as an important factor that determines characteristics of the element. Thus, for the purpose of stabilizing the element characteristics, a method of manufacturing an electronic part has been desired in which the distance between the wiring patterns, that is, the thickness of each layer in the electronic part can be reliably controlled.
However, in the above-mentioned manufacturing method shown in FIG. 6A, it is only performed that: the insulating layer 1 is subjected to laser processing for making a hole; and the conductor portion is formed inside the hole 2. The thickness of the entire layer is not managed.
Further, in the manufacturing method shown in FIG. 6B, the resin is applied through spin coating to form an insulating resin layer so as to cover the conductor portion; however, a swell is generated on a surface of the insulating resin depending on the existence of the conductor portion 4. Thus, it has been difficult to uniformly set the thickness of the entire layer.
Moreover, a method of controlling the thickness of the entire layer has not been disclosed either in the method in which: a bump composed of a conductive paste is formed on a wiring on a substrate; and then, the bump is made to penetrate into a forming resin through pressing. Furthermore, also in JP 2002-134881 A, it is only performed that filling of the paste is conducted to form the via hole conductor, and the thickness of the entire layer is not controlled.
In JP 06-57455 B, after the pressing step is completed, the mould releasing film needs to be released from a surface of the insulating layer. However, an external force may act on the surface of the insulating layer due to this releasing operation, which causes deformation or the like on the surface of the insulating layer. Also, as in FIG. 6B, since the resin is applied to cover the conductor portion, a swell is generated on the surface of the insulating resin. Thus, it may be difficult to uniformly set the thickness of the entire layer.
In the mean time, in a general method of manufacturing an electronic part, it is generally performed that a surface of an insulating layer is roughened to improve adhesion property with respect to a copper foil that forms a wiring pattern. However, it is known that some of resins for forming an insulating layer are chemically stable, and thus, are difficult to be subjected to a roughening process with the use of chemicals. Therefore, a manufacturing method has been desired in which a bonding strength with respect to a wiring layer can be reliably secured even with the use of such a chemically stable resin.